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Affordable High-Density Chip On Board Increasing the unit area functionality of circuit cards has been an ever-present Electronic Industry trend. The recent past has seen increased density increases through area-array component packaging implementation, predominately by using ball grid array (BGA) and chip-scale package (CSP) devices. In 1998, U.S. Electronics Industry Roadmaps projected packaging requirements necessary to realize high-density circuit functions at the system level circuit card assembly using current and next generation chip packaging technologies. The roadmaps predicted a requirement for a paradigm shift in approach in both areas; that is, the development of redistribution layer printed circuit boards (PCB) and chip size packages. Application of these technologies was demanding the assembly capability in both the commercial and defense industries.. The first phase was co-funded by the Consortium and the Air Force ManTech Program as there was strong Department of Defense (DoD) interest in application of the technology. ManTech Program funding was exhausted in 1998 after completion of the Phase 1: mixed technology assembly process development. The Phase 2 CTMA effort leveraged the prior results obtained through the first phase of the project. Phase 2 centered on: 1) verification of assembly processed used in conjunction with high-density interconnect (HDI) PCBs, 2) development of processes for reworkable underfills, and 3) solder joint rework and reliability testing. The Phase 2 technical effort was completed in December 2003. The purpose of the project was to develop the assembly process and to test the reliability of using the emerging higher-density surface-mount technology (SMT) devices and the chip-on-board (COB) die on the same PCB with conventional SMT parts. Because of the much smaller and tighter traces and solder pads of this technology, development of the rework/repair processes is a significant capability need for industry and the DoD Depot community. With these new materials and higher density packaging, a demonstrated understanding of the materials, assembly interaction and rework processes is critical to obtaining the high reliability required for both commercial and defense industries. This mixed technology, SMT, COB and PCBs with HDI technology, allows for increased unit area functionality of circuit cards with much higher integrated circuit densities. The increased density produces additional flexibility in module partitioning and layouts and increases assembly reliability through lower junction temperatures. The emerging high-density devices all used solderballs to physically and electrically connect the devices to the PCBs. These device types were BGA packages, CSP and flip-chip (FC) components also known as direct-chip-attach (DCA) devices. This project collected performance data on the assembly processes, integrity and performance limits of the component to board solder joints, and the use of adhesives and underfills. This information was then used to determine the feasibility of incorporating this technology into future products. The HDCOB Consortium designed test vehicles (TVs) that allowed the partners to populate boards with daisy-chained components allowing for thorough reliability tests. Included in the TV designs were solder land pads that provided the opportunity to try various solder stencil aperture designs; three different surface finishes to determine which one would provide the best combination of first-pass solder joint quality and thermal-cycle testing reliability; solder mask features to study and optimize methods for dispensing both reworkable and non-reworkable underfill materials under the CSP and FC devices; and to develop and test rework methods for the removal and replacement of the CSP and FC devices and then test the affects of those rework processes on solder joint reliability of those components. Because of the collaborative efforts, each of the industry participants developed manufacturing capabilities, performed reliability tests and were beginning to use the higher-density technology much sooner than otherwise would have occurred. Key Consortium findings were:
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